1. Field of the Invention
The invention relates to a digital-to-analog converter, and more particularly to an interpolative digital-to-analog converter.
2. Description of the Related Art
Referring to FIG. 1, a conventional 6-bit digital-to-analog (D/A) converter 1 is adapted to convert a digital signal D[5:0] into an analog signal Vout. The digital signal D[5:0] has 1st to 6th bits D[0]˜D[5]. The conventional 6-bit D/A converter 1 includes 126 switches 11 and a buffer stage 12, and receives the 1st to 6th bits D[0]˜D[5], and 1st to 64th reference voltages Vref0˜Vref63 having an arithmetic progression relationship in magnitude. The conventional 6-bit D/A converter 1 employs the switches 11 to perform binary-tree decoding based on the 1st to 6th bits of the digital signal D[0]˜D[5] to output one of the 1st to 64th reference voltages Vref0˜Vref63 as the analog signal Vout through the buffer stage 12. In FIG. 1, the switches 11 corresponding to D[*] do not conduct when D[*]=0 and conduct when D[*]=1, while the switches 11 corresponding to D[*] do not conduct when D[*]=1 and conduct when D[*]=0. Therefore, Vout=Vref0 when D[5:0]=000000, Vout=Vref1 when D[5:0]=000001, Vout=Vref2 when D[5:0]=000010, . . . , and Vout=Vref63 when D[5:0]=111111.
However, the large number of the switches 11 employed in the conventional 6-bit D/A converter 1 results in complicated routing and requirement of a large layout area.